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This video is part of the appearance, “Xsight Labs Presents at AI Infrastructure Field Day“. It was recorded as part of AI Infrastructure Field Day 4 at 10:00AM - 11:30AM PT on January 29, 2026.
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The E-Series session explores the convergence of storage, networking, compute, and security into a single, cohesive silicon platform. This “Cloud-on-a-chip” approach is dissected through its architecture and programming model to show how it simplifies complex data center environments. We will highlight our partnership with the Hammerspace solution, demonstrating how E-Series silicon powers a global data environment. Xsight Labs presents its E-Series, a System-on-a-Chip (SOC) designed to deliver “Cloud-on-a-chip” capabilities by integrating essential cloud elements. This includes Ethernet connectivity, robust security features, virtualized storage, and powerful processing via 64 ARM Neoverse N2 cores. The E-Series chip, which has been generally available for about four months, is offered in various form factors, including a server, an add-in card, and a COMEX module, targeting applications ranging from embedded systems to full servers.
Xsight Labs differentiates its E-Series architecture from traditional DPUs, which typically evolve from a NIC with a constrained CPU cluster. The E-Series began with a server-class compute system featuring 64 ARM Neoverse N2 cores, specifically optimized and sized for data-plane applications. This allows all packets and PCIe transactions to be terminated and processed in software using standard programming models like Linux, DPDK, or SPDK, eliminating proprietary code. The chip integrates an E-unit for Ethernet connectivity, offering inline encryption and stateless offloads, and a P-unit for PCIe Gen 5, providing up to 40 lanes and 800Gb bandwidth. This PCIe unit can software-emulate various devices (storage, networking, RDMA), offering immense flexibility. With a typical power consumption of 50-75W (up to 120W TDP) and a SpecInt rating of 170, the E-Series offers significant compute power efficiently. Beyond network and memory encryption, the roadmap for the follow-on E2 product includes CXL support, targeting 1.6T bandwidth.
The E-Series supports a broad range of use cases, from front-end DPUs in public cloud and AI clusters (offloading the host, providing virtualization and isolation) to back-end DPUs in AI inference clusters for KV cache offload. It also extends to local storage, bump-in-the-wire network appliances for security and load balancing, smart switches for stateful processing, edge servers, and storage target appliances. Xsight Labs provides a comprehensive software development kit, ensuring compatibility with standard ARM server operating systems such as Ubuntu, as well as Linux and DPDK drivers. A key demonstration of the E-Series’ capability is its performance on the Sonic Dash “Hero Benchmark,” a highly intensive SDN workload. This test requires processing millions of routes, prefixes, and mappings, which largely depends on off-chip DRAM due to poor cache locality. The E1 exceeded the benchmark requirement of 12 million new connections per second with 120 million background connections, without packet drops, by almost 20%, while still retaining CPU capacity for control-plane operations, making it the only DPU to pass this test at 800Gb with a single device.
Personnel: John C Carney, Ted Weatherford









